SCOPE AND OBJECTIVES
Today, the integration of many cores is quite common - and the end of the road is not in sight.  These many-core architectures bring up unprecedented capabilities, opportunities, as well as challenges.  The more transistors are integrated on a chip and the more cores are introduced, the more faults can be asserted.  These faults arise either during fabrication or operation.  As the fabrication costs are continuously rising, it is most important to increase the output of a fab by software, architectural, or physical means.  This workshop addresses issues and solutions through dependable software and/or hardware design of many-core systems.

The Workshop topics of interest include (but are not limited to) the following:

Dependable Many-Core Architectures Power-Aware Many-Core Design Dependable & Secure Many-Core Designs Many-Core Development and Design Tools Simulation Techniques System-Level Many-Core Implementation Many-Core Interconnect Technology Many-Core System-On-Chip Development Reconfigurable Computing and FPGAs Design for Testing Hardware and Software Debug Facilitie

Many-Core Programming and Optimization Application Partitioning and Load Balancing Hypervisors and Virtual Machine Technology Trusted and Untrusted Environments Virtualization for Dependability Dependability through Multi-Threading Fault Detection on the Physical Layer Fault-Tolerant Software Design Fault-Tolerant Hardware Design Fault-Tolerant HW/SW Co-Design

INSTRUCTIONS FOR AUTHORS:
You are invited to submit original and unpublished research works on above and other topics related to    .  Submitted papers must not have been published or simultaneously submitted elsewhere.  Submission should include a cover page with authors' names, affiliation addresses, fax numbers, phone numbers, and email addresses.  Please, indicate clearly the corresponding author and include up to 6 keywords from the above list of topics and an abstract of no more than 400 words.  The full manuscript should be at most 7 pages using the two-column IEEE format.  Additional pages will be charged additional fee.  Short papers (up to 4 pages), poster papers and posters (please refer to http://hpcs2012.cisedu.info/home/posters  for the submission details) will also be accepted for submission.  Please include page numbers on all preliminary submissions to make it easier for reviewers to provide helpful comments. 

Paper submission is handled through the Easychair conference system at  https://www.easychair.org/conferences/?conf=dmcc2012.  

Only PDF files will be accepted, uploaded to the link above.  Each paper will receive a minimum of three reviews.  Papers will be selected based on their originality, relevance, technical clarity and presentation.  Submission implies the willingness of at least one of the authors to register and present the paper, if accepted.  Authors of accepted papers must guarantee that their papers will be registered and presented at the workshop. 

Accepted papers will be published in the Conference proceedings.  Instructions for final manuscript format and requirements will be posted on the HPCS 2012 Conference web site.  It is our intent to have the proceedings formally published in hard and soft copies and be available at the time of the conference.  The proceedings is projected to be included in the IEEE Digital Library and indexed accordingly. 

If you have any questions about paper submission or the workshop, please contact the workshop organizers. 


IMPORTANT DATES


WORKSHOP ORGANIZERS



Tentative International Program Committee: 
All submitted papers will be rigorously reviewed by the workshop technical program committee members following similar criteria used in HPCS 2012. 

• Koen de Boesschere, University of Ghent, Belgium
• I. Koren, University of Massachusetts Amherst, MA, USA
• Jens Lisner, TÜV-Nord Group, Germany
• Wei W. Liu, Intel Labs – Santa Clara, CA, USA
• Avi Mendelson, Microsoft R&D, Israel
• Andre Osterloh, BTC Oldenburg, Germany
• Christine Rochange, Institut de Recherche en Informatique de Toulouse, France
• Volkmar Sieh, University Erlangen-Nuremberg, Germany
• Sascha Uhrig, Technical University of Dortmund, Germany
• Osman Unsal, Barcelona Supercomputing Center, Spain

For information or questions about Conference's paper submission, tutorials, posters, workshops, special sessions, exhibits, demos, panels and forums organization, doctoral colloquium, and any other information about the conference location, registration, paper formatting, etc., please consult the Conference’s web site at http://cisedu.us/rp/hpcs12 or contact one of the Conference's organizers. 

If you have any questions about the HPCS 2012 conference paper submission, please contact Conference Program Chair:  Waleed W. Smari, Voice: +1 (937) 681-0098, Email: smari@arys.org.